An STM32 clock tree selects one or more oscillators, optionally multiplies or divides them through a PLL, and distributes clocks to the CPU, buses, timers, and peripherals. Exact frequencies and constraints are device-specific; use the reference manual and datasheet for the target part.
Clock sources
- HSI is the internal high-speed RC oscillator. It starts quickly and needs no external component, but is less accurate than a crystal.
- HSE is a high-speed external crystal, resonator, or bypass clock. It may feed the system directly or serve as a PLL source.
- LSI is an internal low-speed oscillator commonly used by the independent watchdog and some low-power functions.
- LSE is normally a 32.768 kHz external crystal for an accurate real-time clock.
PLL and buses
The PLL derives a higher-frequency clock while respecting input, internal, and output ranges. The system clock then passes through AHB and APB prescalers. Peripheral clocks may have additional muxes; timer clocks on some STM32 families run at twice the APB frequency when the APB prescaler is greater than one.
Flash wait states and voltage scaling must support the target core frequency before switching to it. USB, audio, RNG, ADC, and other peripherals may require exact or bounded clock domains that constrain the PLL choices.
Safe configuration sequence
- Enable the selected oscillator and wait for its ready flag with a timeout.
- Configure voltage scaling and flash latency for the target frequency.
- Program bus prescalers and PLL factors while the PLL is disabled.
- Enable the PLL and wait for lock.
- Switch the system clock and confirm the status bits.
- Update the software’s system-frequency value and configure peripheral clocks.
Do not copy clock constants between STM32 families. Verify the result by routing a clock to an MCO pin when available, measuring timer behavior, and checking baud rates. Provide a fallback or controlled fault path if an external oscillator fails.
